1. Field of the Invention
The present invention relates to a method of calculating a model formula for circuit simulation. In order to obtain high accuracy and high speed of a circuit simulator used in design of an integrated circuit, a model formula to be installed in the circuit simulator is obtained by extracting a model parameter by means of decomposition technique of actually measured data, and using the model parameter.
2. Description of the Prior Art
As conventional technique, a LEVEL1 model has been developed in Berkley campus, of California University in United State of America. Then, as a channel length becomes shorter, LEVEL2 and LEVEL3 models have been developed in the same university. A BSIM model, a BSIM2 model, a BSIM3 model and BSIM4 model have been developed continuously from the time when a channel length becomes less than 1 μm. Further, in industry, Fairchild Semiconductor developed a MOS9 model improved from the BSIM model. Moreover, recently, a HiSIM model is being developed in Hiroshima University in Japan.
The conventional models ignore parasitic resistance in order to speed up a circuit simulator. Further, in the case where it becomes a state where parasitic resistance cannot be ignored, a model formula in which the parasitic resistance is incorporated has been developed. However, since a model formula on the basis of physical phenomena which is obtained by decomposing actually measured data has not been developed, there is a problem that new models are to be developed in turn as a channel length becomes shorter. Further, in the case of a special process such as a high-pressure proof process, there is a problem that other model formula is developed in spite of having the same transistor structure.